Questions

Q:

In computer network nodes are

A) the computer that terminates the data B) the computer that originates the data
C) the computer that routes the data D) all of the mentioned
 
Answer & Explanation Answer: D) all of the mentioned

Explanation:

In computer network nodes are

* the computer that terminates the data

* the computer that originates the data

* the computer that routes the data

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Q:

Who propounded the Market law?

A) J. B. Say B) T. R. Malthus
C) Adam Smith D) David Ricardo
 
Answer & Explanation Answer: A) J. B. Say

Explanation:
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Q:

The central Scientific Instruments Organisation is situated at  

A) Chennai B) Bangalore
C) Chandigarh D) New Delhi
 
Answer & Explanation Answer: C) Chandigarh

Explanation:
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Q:

Two greatest Buddhist universities of Nalanda and Vikramshila were patronised by the 

A) Palas B) Paramaras
C) Chandelas D) All the above
 
Answer & Explanation Answer: A) Palas

Explanation:
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Q:

Information on a computer is stored as _________

A) analog data B) digital data
C) modem data D) watts data
 
Answer & Explanation Answer: B) digital data

Explanation:
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Q:

Which results in an increase in power?

A) doing more work in less time. B) doing less work in more time.
C) doing less work in less time. D) doing more work in more time.
 
Answer & Explanation Answer: A) doing more work in less time.

Explanation:

Doing more work in less time, results in an increase in power to do a work.

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Q:

What is the structural unit of compact bone?

A) Osteon B) Spongy bone
C) Lamellae D) Periosteum
 
Answer & Explanation Answer: A) Osteon

Explanation:

what_is_the_structural_unit_of_compact_bone1536568861.jpg image

 

The structural unit of compact bone is Osteons or Haverisan systems.

 

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Q:

What are set up time & hold time constraints? What do they signify? Which one is critical for estimating maximum clock frequency of a circuit?

Answer

Suppose your flip-flop is positive edgetriggered. time for which data should be stable prior to positive edge clock is called setup is called setup time constraint.


Time for which data should be stable after the positive edge of clock is called as hold time constraint.


If any of these constraints are violate d then flip-flop will enter in meta stable state, in which we cannot determine the output of flip-flop.


there are two equation:


1. Tcq + Tcomb > Tskew + Thold


2. Tcq + Tcomb > Tskew + T - Tsetup


Tcq is time delay when data enters the flip flop and data comes at output of flip flop.


Tcomb is the logic delay between two flip flop.


Tskew is the delay of clock to flip flop: suppose there are two flip flop, if clock reaches first to source flip flop and then after some delay to destination flip flop, it is positive skew and if vice versa then negative  skew. 


so if you take 2 eq you will see that setup time is the determining factor of clock's time period.

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