Technical Questions

Q:

Where does CPU Enhanced mode originate from?

Answer

Intel's 80386 was the first 32-bit processor, and since the company had to backward support the 8086. All the modern Intel-based processors run in the Enhanced mode, capable of switching between Real mode (just like the real 8086) and Protected mode, which is the current mode of operation.

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Q:

Where does the Real mode on the CPU come from?

Answer

The original 8086, which only had 1 MB of memory. This megabyte is split into low memory for IRQ tables, application memory and high memory.

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Q:

How to clear Computer Motherboard CMOS password?

Answer

To clear the CMOS password you just remove the CMOS Battery or else you can also use a jumper settings.

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1 1715
Q:

What are the basic expansion card types?

Answer

The basic expansion card types in A+ Hardware certification are ISA and PCI, ISA these can be used only on XT, AT and ATX boards. The industry now considers ISA obsolate.

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0 2173
Q:

What are the different Adder circuits you studied?

Answer

Adders are generally of five types:


1.Ripple Carry Adder:


The Ripple carry adder(RCA) consists of a building block named Half Adder(HA) which is cascaded to form a Full Adder(FA). These buildingblocks HAs and FAs are also the building blocks of all types of adders.The n full adders are cascaded to form n bit RCA.


The full adder has three input pins(input Ai,input Bi,carryin Ci) and two output pins(Sum and Ci+1).Its equations are:


Sum=Ai^Bi^Ci


Ci+1=Ai.Bi+Bi.Ci+Ai.Ci


 


2. Carry Lookahead Adder:


The Carry Lookahead Adder(CLA) reduces the delay as that in RCA. Let Gi=Ai.Bi, and Pi=Ai^Bi, then Ci+1=Gi+Pi.Ci.


The expressions for Sum and Ci+1 is then defined completely in terms of input pins rather wait for input carry to appear.


 


3. Carry Select Adder:


The carry select adder uses duplicate modules for each combination of input carry(i.e. 1 and 0).The multiplexers then select the appropriate sum and carry output according to the carry output of the preceding stages.


 


4. Carry Skip Adder:


The carry skip adder are as fast as carry lookahead adders which are the fastest adders but its spped decreases to about 20-30% if input operands are 64-bit or more. In these adders we divide the input bit stream into various blocks and make use of two observations:


-if each element of the two bit streams are unequal,i.e. Ai!=Bi than the carry input of the block is equal to the carry input.


-if each element of the two bit streams are equal,i.e. Ai=Bi than the carry input of the block is opposite of the carry input.


 


5. Carry Save Adder:


The carry save adder reduces the addition of three elements into addition of two elements,i.e. if you want sum of nine numbers it reduces it into sum of six numbers. In first step the sum of three numbers is calculated without bothering for the carry.During the second step only carry is calculated which is then added to the generated sum to give the required sum. 

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0 2856
Q:

What are set up time & hold time constraints? What do they signify? Which one is critical for estimating maximum clock frequency of a circuit?

Answer

Suppose your flip-flop is positive edgetriggered. time for which data should be stable prior to positive edge clock is called setup is called setup time constraint.


Time for which data should be stable after the positive edge of clock is called as hold time constraint.


If any of these constraints are violate d then flip-flop will enter in meta stable state, in which we cannot determine the output of flip-flop.


there are two equation:


1. Tcq + Tcomb > Tskew + Thold


2. Tcq + Tcomb > Tskew + T - Tsetup


Tcq is time delay when data enters the flip flop and data comes at output of flip flop.


Tcomb is the logic delay between two flip flop.


Tskew is the delay of clock to flip flop: suppose there are two flip flop, if clock reaches first to source flip flop and then after some delay to destination flip flop, it is positive skew and if vice versa then negative  skew. 


so if you take 2 eq you will see that setup time is the determining factor of clock's time period.

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1 4582
Q:

Give a circuit to divide frequency of clock cycle by two?

Answer

You can divide the frequency of a clock by just implementing T Flip flop.


Give clock as clock input and tie the T input to logic 1.

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0 1675
Q:

How do you detect if two 8-bit signals are same?

Answer

Pass input to XOR and give their outputs to OR gate, if your output is 0 both 8-bit signals are same.


OR


Pass input to XNOR and give their outputs to AND gate, if your output is 1 both 8-bit signals are same. 

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