i) Let the ages of the five members at present be a, b, c, d & e years. 

And the age of the new member be f years. 

ii) So the new average of five members' age = (a + b + c + d + f)/5 ------- (1) 

iii) Their corresponding ages 3 years ago = (a-3), (b-3), (c-3), (d-3) & (e-3) years 

So their average age 3 years ago = (a + b + c + d + e - 15)/5 = x ----- (2) 

==> a + b + c + d + e = 5x + 15 

==> a + b + c + d = 5x + 15 - e ------ (3) 

iv) Substituting this value of a + b + c + d = 5x + 15 - e in (1) above, 

The new average is: (5x + 15 - e + f)/5 

Equating this to the average age of x years, 3 yrs, ago as in (2) above, 

(5x + 15 - e + f)/5 = x 

==> (5x + 15 - e + f) = 5x 

Solving e - f = 15 years. 

Thus the difference of ages between replaced and new member = 15 years.

Let the total score be x.

(x + 92 - 85) / 8 = 84.

So,  x + 7 = 672   => x = 665.

Total pice of the two books = Rs. [(12 x 10) - (11.75 x 8)]

                                          = Rs. (120 - 94) = Rs. 26.

let the price of one book be Rs. x

Then, the price of other book = Rs. (x + 60% of x) = Rs.(x+(3/5)x) = Rs. (8/5)x

So,  x+(8/5)x =26 <=> x =10

The prices of the two books are Rs. 10 and Rs. 16

Suppose your flip-flop is positive edgetriggered. time for which data should be stable prior to positive edge clock is called setup is called setup time constraint.

Time for which data should be stable after the positive edge of clock is called as hold time constraint.

If any of these constraints are violate d then flip-flop will enter in meta stable state, in which we cannot determine the output of flip-flop.

there are two equation:

1. Tcq + Tcomb > Tskew + Thold

2. Tcq + Tcomb > Tskew + T - Tsetup

Tcq is time delay when data enters the flip flop and data comes at output of flip flop.

Tcomb is the logic delay between two flip flop.

Tskew is the delay of clock to flip flop: suppose there are two flip flop, if clock reaches first to source flip flop and then after some delay to destination flip flop, it is positive skew and if vice versa then negative  skew. 

so if you take 2 eq you will see that setup time is the determining factor of clock's time period.

One way is shorting the two inputs of the NAND gate and passing the input.

truth table:

A B output

1 1 0

0 0 1

The second way is passing the input to only one input (say A) of the NAND gate. Since the other input  (say B is floating, it is always logic one.

Truth table:

A B output

1 1 0 

0 1 1

A SIPO and AND gate circuit can detect this sequence.The output of SIPO is connected to a four input AND gate ,the third SIPO output should be connected through a NOT gate.When the 1101 sequence is loaded in to the SIPO the AND output goes HIGH otherwise keeps LOW.

Total age of 4 members, 10 years ago = (24 x 4) years = 96 years.

Total age of 4 members now = [96 + (10 x 4)] years = 136 years.

Total age of 6 members now = (24 x 6) years = 144 years.

Sum of the ages of 2 children = (144 - 136) years = 8 years.

Let the age of the younger child be x years.

Then, age of the elder child = (x+2) years.

So, x+(x+2) =8 <=> x=3

Age of younger child  =  3 years.

Overloading allows multiple functions to exist with same name but different parameters. Again if you take bike as an example, it has a function “Start” with two forms i.e. ’Auto Start’ and ’kick start’.